PR's in 2016

SynTest Solutions for Automotive IC Design (June 16, 2016)

  PR's in 2012

StarDFX, a SynTest Affiliate, Granted Patent for a Framework for Soft-Error Protection (August 8, 2012)

  PR's in 2009

SynTest Unveils RobustScan™ Framework for Soft-Error Protection (July 23, 2009)

SynTest Unveils MultiCoreScan™ framework for ATPG Speed-Up (July 21, 2009)

  PR's in 2008

SynTest Receives Two Fundamental Patents on Scan Compression (September 12, 2008)

SynTest Founder, CEO, President Dr. L.-T. Wang appointed 2008 IEEE Fellow (January 10, 2008)

  PR's in 2007

SynTest Receives A Fundamental Patent on At-Speed Capture Invention for Scan ATPG (November 14, 2007)

SynTest granted 6 more Patents since October 2006 (July 24, 2007)

  PR's in 2006

Elsevier New Textbook serves as Comprehensive Guide for Latest, Up-to-Date Technologies of Design-for-Testability
(June 19, 2006)

SynTest Receives a Patent for Debug, Diagnosis, and Yield Improvement of ICs using Test Compression or Logic BIST (June 8, 2006)

SynTest Receives A Patent for Eliminating Unpredictability of ATPG Capture results due to Unknown ('X') Values when Using Test Compression
(April 25, 2006)

SynTest Receives a Fundamental Patent for At-Speed Capture Invention for Logic BIST; "Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Self-Test or Scan-Test"
(February 28, 2006)

  PR's in 2005

SynTest Receives "Computer-aided design system to automate scan synthesis at register-transfer level" Patent for RTL Scan Synthesis Invention (October 25, 2005)

SynTest Receives "Multiple-capture DFT system for scan-based integrated circuits" Patent for At-Speed Scan/BIST Invention (October 18, 2005)

SynTest Previews UltraScan To Reduce Cost of Testing For Nanometer Technology ASICs (July 19, 2005)

  PR's in 2004

SynTest Signs QualCore Logic as Distribution Partner for India (November 3, 2004)

SynTest Announces DFT-PRO 100/200 Series
(October 15, 2004)

ChipX Selects SynTest's VirtualScan . Scan/ATPG Tool to Reduce Test Costs for Next Generation Large ASICs (September 29, 2004)

At D.A.T.E., SynTest to Showcase Integrated RTL-to-GDSII DFT Flow Featuring Magma Software
(February 16, 2004)

SynTest Establishes Operations in China And Appoints Hyperform as Distributor
(January 22, 2004)

  PR's in 2003

SynTest Signs Logicad As Distribution Partner For India (September 11, 2003)

SynTest DFT Tools Facilitate Micrel's First-to-Market Status (September 3, 2003)

Teseda and SynTest Team on Failure Diagnostics for Advanced SoCs (August 18, 2003)

3MTS and SynTest Announce - Step-X (June 2, 2003)

SynTest Announces DFT-PRO Plus (June 2, 2003)

SynTest Joins MagmaTies Program (April 7, 2003)

  PR's in 2002

SynTest Signs e2m systems as Its Distribution Partner for Germany, Austria and Switzerland

(October 30, 2002)

SynTest's TurboFault Simulator Links To Novas Debussy Debug System (October 28, 2002)

SynTest continues to grow, opens 2nd R&D office in Taiwan (October 3, 2002)

Advantest and SynTest Team on Failure Diagnostics for Advanced SoCs(September 24, 2002)

SynTest Reduces the Cost of Semiconductor Testing (September 3, 2002)

SynTest Continues Growth: Expands Headquarters, Opens Southern California Office (August 16, 2002)

SynTest Establishes SynTest Japan Ltd. (July 2, 2002)

Bay Microsystems Delivers 10Gbps Network Processor Developed with SynTest's DFT Tools (June 5, 2002)

SynTest Expands Its Electronic Design Debugging Product Line, Introduces TurboDebug For SOC MEMORY-BIST DEBUG (June 10, 2002 )


  PR's in 2001

SynTest Reveals Its Vision for Electronic Design Debugging, Previews Its First JTAG-BASED DEBUG and Visualization System at the International Test Conference
(November 12, 2001)

SynTest Introduces DFT Software that Automatically Stitches Test-Ready Design Blocks and Cores Together to Improve the Quality of IC and SoC Designs. (November 12, 2001)

SynTest Teams with TSMC to Improve SoC Testability (October 10, 2001)

SynTest and SABER Team to Provide DFT and Test Engineering Services (October 10, 2001)

Fabless Semiconductor Company, Avalent Technologies, Chooses SynTest's DFT Tools to Improve Testability of ASICs... (October 10, 2001)

SynTest Opens Design-for-Test Services Facility in Austin (June 25, 2001)

Sanyo Selects SynTest For Fault Simulation (June 18, 2001)

Synplicity ASIC Synthesis Product Offers Support For Leading ASIC Design Tools and IP Libraries (June 4, 2001)

BOPS Signs SynTest as a Topstar Authorized Design Center for DFT(May 29, 2001)

eASIC Implements SynTest's Tools for Its Single-mask Configurable IP Core To Allow Efficient Testability (March 15, 2001)

SynTest Introduces LOGIC BIST Tool (March 12, 2001)

SynTest Adds Key Execs to Its Business Development Staff (Feb. 8, 2001)


  PR's in 2000

Agilent Technologies and SynTest Agree to Offer Chip Design Consultant Services
(Oct. 3, 2000)

VIA Selects SynTest for Fault Simulation and ATPG for Its High Performance ASIC Products (June 26, 2000)

Cadence and SynTest Announce Partnership for One Pass Test Synthesis
(June 5, 2000)

SynTest Adds Linux Platform Support For Its DFT Solutions (May 29, 2000)

SynTest Adds VHDL Capability To Its RTL Testability Analysis Tool Suite (March 27, 2000)


  PR's in 1999

SynTest Unveils Plans for Integrated Expert DFT Tool Suits for DSM and Networking Applications
(Nov 23, 1999)

SynTest Enters the BIST Market (March 8, 1999)

SynTest Announces Y2K Compliance of its Tools Suite (March 1, 1999)

LG Semicon Licenses Its HDL Logic Simulator to SynTest Technologies (Jan 18, 1999)


Other Press Release Archive