SYNTEST SIGNS e2m systems AS ITS DISTRIBUTION PARTNER
FOR GERMANY, AUSTRIA and SWITZERLAND

MUNICH, Germany and SUNNYVALE, Calif., USA. October 30, 2002. SynTest Technologies, Inc. (Sunnyvale, Calif., USA), the leading supplier of DFT (Design-for-Test) tools and services for integrated circuit designers and foundries, today announced that it has signed e2m systems of Munich, Germany, as its distribution partner for Germany, Austria and Switzerland.

SynTest's products and services improve an electronic design's testability and fault coverage and result in reduced defect levels and test cost, as well as improved time-to-market.

Dr. Ravi Apte, vice president of strategy and business development at SynTest remarked, "With Franz Maidl, a seasoned EDA professional as its head, e2m systems is a well-positioned and experienced representative for our DFT offerings in Europe. e2m systems' presence in the these countries helps provide local support to companies seeking to improve their circuit and system testability and reduce test costs."

Franz Maidl, managing director of e2m-systems, noted, "We selected SynTest because it has the best DFT and scan synthesis tools available today. Our aim is to provide our customers with the most advanced SOC test capabilities. We look forward to working with a technology leader such as SynTest to help us achieve these strategic objectives."

About SynTest

SynTest Technologies, Inc. develops and markets advanced Design For Test (DFT) and Design For Debug/Diagnosis (DFD) tools to semiconductor companies, ASIC designers and test groups throughout the world. Headquartered in Sunnyvale, California, the company has offices in Southern California, Texas, Taiwan, Korea and Japan. The company's products improve an electronic design's testability and fault coverage, and result in reduced defect levels, reduced costly tester time, and reduced slippage in time-to-market. These products include tools for built-in self-test (BIST) for logic and memory, boundary-scan synthesis, DFT testability analysis, scan synthesis, automatic test-program generation (ATPG), concurrent fault simulation, silicon debug and diagnosis. More information is available at www.syntest.com. SynTest Technologies Inc. is headquartered at 505 South Pastoria Ave., Suite 101, Sunnyvale, California 94086, Phone: 408-720-9956, E-Mail: info@syntest.com

Notes to editors:
Contact Information
Franz Maidl
e2m-systems GmbH & Co.KG
Bruno-Frank-Weg 4a D-80995 Muenchen / Germany
Telefon +49. 89.1507392
Telefax +49. 89.1507392
Mobil +49.172.8902178
E-mail:FMaidl@e2m-systems.com

Acronyms:
DFT: Design-for-Test
EDA: Electronic Design Automation
RTL: Register-Transfer Level
SOC: System-on-Chip

TurboCheck, TurboScan, VirtualScan, TurboFault, TurboBSD and TurboBIST are trademarks of SynTest Technologies, Inc. All other tradenames and trademarks are the property of their respective owners.

For Immediate Release
For Release October 30, 2002
Press Contact:
Georgia Marszalek, ValleyPR for SynTest, 650-345-7477, Georgia@ValleyPR.com