SynTest Enters the BIST Product

Introduces TurboBIST-SRAM for Memory Testing
ITeX Reports Memory Testing Success

Munich, Germany and Sunnyvale, CA, USA - March 8, 1999 - DATE Conference - SynTest Technologies, Inc. (Sunnyvale, CA, USA), an EDA Company and supplier of DFT tools for IC designers and foundries, today announced its first entry into the BIST market.

TurboBIST-SRAM

TurboBIST-SRAM reduces the time and effort required for design, test development and testing of embedded single and dual-port RAMs, and improves production quality. It also synthesizes SRAM BIST structures for any user-specified test algorithms.

L.-T. Wang, SynTest Technologies's president, remarked, "Our plans include become a leading supplier of DFT solutions. In order to do this, we are extending our product line to address the fast growing BIST market."

Wang noted, "TurboBIST-SRAM is our first entry into the BIST market. We have successfully applied TurboBIST-SRAM and our DFT services to more than 100 SRAM models at 8 customer sites. We plan to add other BIST products and services over time to address DRAMs, SDRAMs, CAMs,logic and cores."

ITeX Reports Success with SynTest'S BIST Tool and Service:

Dr. Jordan Lai, Director of Technology at ITeX (Santa Clara, CA), reported, "We used SynTest's TurboBIST solution and services to further improve the quality of our ADSL chip. Our part has 46 memory modules, including ROMs, and single-port and dual-port RAMs. In just two weeks, we achieved very high fault coverage test patterns using moving inversion March and several of our custom algorithms."

More about SynTest's TurboBIST-SRAM Tool and Service:

SynTest offers TurboBIST-SRAM as a tool and as a service for customers who send SynTest their
functional circuits descriptions in either VHDL or Verilog HDL. SynTest returns fully implemented
BIST and test bench/test pattern information for inclusion in their system-on-chip (SoC) designs.

TurboBIST-SRAM synthesizes built-in self-test (BIST) structures around embedded SRAM cells used in SoC designs. It adds the necessary BIST controller logic and automatically generates the BIST test patterns needed to run in an embedded memory cell production environment.

Pricing and Availability:

TurboBIST-SRAM is available now for UNIX workstations from Sun Microsystems (NASDAQ: SUNW). In the US, it is priced at $50,000, in Europe $62,500 (USD).

Additional TurboBIST-SRAM features include:

• Support for March C- (10n), Moving Inversion March (13n), March C+ (14n), checkerboard (4n)
  and other user configurable test algorithms,
• Automatic Verilog and VHDL testbench output, and
• Handling of redundancy features, address and data scrambling and failure mapping.

About SynTest's DFT Products:

SynTest's RTL products include TurboBIST-SRAM for memory testing, TurboFCE™, a fault coverage enhancer, and TurboCheck™, a design and testability analyzer. These products work with popular RTL fault simulators.

SynTest's gate-level products include TurboBSD™, a boundary-scan test suite; TurboCheck, a design and testability analyzer; and TurboScan™, a partial-scan and full- scan synthesis and ATPG program, and TurboFault™, a fast software fault simulator.

SynTest's products are all available for UNIX platforms. TurboFCE, TurboCheck and TurboFault are available for the Windows NT platform.

About SynTest:

SynTest Technologies, Inc. develops and markets DFT software tools and offers consulting services throughout the world. SynTest's products improve a design's testability and fault coverage and result in reduced defect levels and tester time. The Company was founded in 1990 and is headquartered in Sunnyvale, CA, USA with offices in Japan, Taiwan and Korea. The Company has distributors in the UK, Germany, Scandinavia and Israel.

SynTest has over 80 customers worldwide, including semiconductor companies, ASIC designers
and test groups.

SynTest Technologies, Inc. 505 S. Pastoria Ave, Suite 101, Sunnyvale, CA 94086, USA, 408-720-9956, Fax: 408-720-9960, info@SynTest.com, http://www.SynTest.com

Contacts for Reader Inquiries:

SynTest Technologies, Inc., 505 S. Pastoria Ave, Suite 101, Sunnyvale, CA 94086, USA, 1-408-720-9956, Fax: 408-720-9960, info@SynTest.com,

UK: !P-DA Europe (pronounced IP-Dah Europe), IP House, 3 Courtneidge Cl, Stewkley,
Bedfordshire, LU7 0EL, United Kingdom, +44 1525 240843, FAX: +44 1525 240881,
Attn: Sean Redmond, sean@btconnect.com

Acronyms and definitions:

ADSL: Asymetric Digital Subscriber Line
ASIC: Application Specific Integrated Circuit
ATPG: Automatic Test Pattern Generation
BIST: Built-in Self-test
CAM Content Addressable Memory
DFT: Design-for-Test
DRAM: Dynamic RAM
EDA: Electronic Design Automation
HDL: Hardware Description Language
IC: Integrated Circuit
RAM: Random Access Memory
ROM: Read Only Memory
RTL: Register Transfer-Level (a design description above gate-level netlists)
SRAM: Static RAM
SDRAM: Synchronous Dynamic RAM
VHDL: VHSIC (Very High-Speed Integrated Circuit) HDL

TurboBIST-SRAM, TurboBSD, TurboCheck, TurboFault, TurboFCE and TurboScan are trademarks of SynTest Technologies, Inc.
All other trademarks are the property of their respective owners.

For release March 8, 1999

For Information Contact:
DATE stand number F15, Georgia Marszalek, SynTest Public Relations Counsel,(650) 345-7477, georgia@valleypr.com