eASIC Implements SynTest's Tools for Its Single-mask Configurable IP Core to Allow Efficient Testability IP/SoC Conference, Santa Clara, Calif., March 15, 2001 - eASIC Corporation today announced that the company has implemented SynTest ATPG (Automatic Test Pattern Generator) tools for its eASICore, a high-performance and high-density single-mask configurable core. These tools will allow eASIC users to improve testability and fault coverage, resulting in reduced defect levels and tester time. eASIC customers can use the SynTest DFT tools, Turbo-Scan-ATPG(TM) and TurboBIST-Memory(TM), to improve their design's testability. eASICore supports
SynTest's TurboBIST for embedded memory testing as well as its tools for
generating design dependent test pattern for manufacturing. Due to eASIC's
special architecture features and the re-programmability capability, the
number of test vectors is reduced significantly. For a typical ASIC design,
a user can expect more than 60% reduction in the number of manufacturing
test vectors required to achieve 98% test coverage. L.-T. Wang, SynTest president, noted, " eASIC has superior technology for the embedded programmable logic market and is one of our first partners addressing this market. Their eASICore customers have the advantage of using our full scan and memory BIST products to make their designs more testable and reduce their tester costs." About eASIC eASIC Corporation
is pioneering a breakthrough approach of embedded configurable ASIC cores
for System-on-Chip designs. This configurable ASIC core, called eASICore,
offers high performance and density with ease-of-design, rapid time-to-market
and low design development cost. About SynTest SynTest Technologies,
Inc., develops and markets DFT, logic and memory BIST synthesis, boundary
scan, ATPG and fault simulation software tools and offers consulting services
throughout the world to semiconductor companies, ASIC designers and test
groups. SynTest has offices in Korea, Taiwan and the USA and distribution
partners in Canada, Israel, France, Italy, the UK, Japan and Singapore. TurboBIST-LOGIC, TurboBIST-Memory, TurboBSD, TurboCheck, TurboFault, TurboFCE and TurboScan are trademarks of SynTest Technologies, Inc. All other trademarks are the property of their respective owners. Contact: Tsipi Landen, eASIC Corporation tsipi@easic.com , Tel: (408) 264-7128 Contact: Georgia Marszalek, ValleyPR georgia@valleypr.com, Tel: 650-345-7477 |