SynTest Opens Design-for-Test Services Facility in Austin

DFT Services Center Specialties Include ASIC and Wireless Circuit Test and Prototype Debugging AUSTIN, Texas & SUNNYVALE, Calif.--(BUSINESS WIRE)--June 25, 2001--SynTest Technologies, Inc. (Sunnyvale, CA, USA), the leading supplier of DFT (Design-for-Test) tools and services for integrated circuit designers and foundries, today announced the opening of a new customer service and support center in Austin, Texas.

Specializing in DFT services covering layout, packaging, and silicon debug, the center supports the Central United States with a special emphasis on Austin's large ASIC design community, and the Dallas area's burgeoning wireless industry. Industry veteran Yo Han Park, who has been named Manager of DFT Services, heads the new facility. Prior to assuming his new position, Park was SynTest's DFT manager in Korea, and has experience with other well-known technology companies including Cadence Korea.

SynTest's DFT services reduce costs, improve the debug process, and speed time to market by adding experienced consulting engineers to the customer's silicon debug and test team. Customized services targeted specifically for this region include memory BIST, BSD and fault grading, and more. In addition, the company offers services for design flow methodology integration, complete turnkey DFT solutions, testability analysis, test synthesis, ATPG, and fault simulation. Successful service projects have included Pentium class CPUs, advanced 3D graphics chips, and network communication devices.

SynTest president, Dr. L.-T. Wang, noted that design growth in Texas makes this an ideal time to provide additional customer support: ``In both Austin and Dallas we are experiencing phenomenal demand for DFT expertise as the complexity of designs continues to soar. Our confidence in this market is such that we are already recruiting for additional help in this area -- DFT services continues to be a wonderful opportunity for SynTest.''

The new office is located at 3445 Executive Center Drive, Suite 221, in Austin. Telephone number is (512) 342-0115.


About SynTest's DFT Services and Products

SynTest provides comprehensive system-on-chip (SOC) design services and solutions for its customers. SynTest's DFT products include TurboBIST(TM) for logic and memory testing, TurboFCE(TM), a fault coverage estimator, TurboBSD(TM), a boundary-scan test suite; TurboCheck(TM), design and testability checkers for RTL and gate-level netlists; and TurboScan(TM), a partial-scan and full- scan synthesis and ATPG program. SynTest also offers TurboFault(TM), a super-fast, concurrent fault simulator.

About SynTest

SynTest Technologies, Inc. develops and markets DFT tools and offers consulting services throughout the world to semiconductor companies, ASIC designers, and test groups. The company's products improve an electronic design's testability and fault coverage and result in not only reduced defect levels and costly tester time, but also reduced slippage in time-to-market.

SynTest has offices in Korea, Taiwan, and the United States, and distribution partners/representatives in Canada, Israel, France, Italy, the UK, Japan and Singapore.

SynTest Technologies, Inc. is located at 505 S. Pastoria Ave, Suite 101, Sunnyvale, CA, 94086, USA, 408-720-9956, Fax: 408-720-9960, info@SynTest.com, www.syntest.com


Notes to editors:

Photo available on request

Acronyms and definitions:

ASIC: Application Specific Integrated Circuit
ATPG: Automatic Test Pattern Generation
BIST: Built-in Self-test
BSD: Boundary Scan Design
DFT: Design-for-Test
RTL: Register Transfer-Level (a design description above gate-level netlists)

TurboBIST-LOGIC, TurboBIST-Memory, TurboBSD, TurboCheck, TurboFault, TurboFCE and TurboScan are trademarks of SynTest Technologies, Inc. All other trademarks are the property of their respective owners.

For Release June 25, 2001
For Information Contact:
Georgia Marszalek, ValleyPR for SynTest, (650) 345-7477,georgia@valleypr.com