SYNTEST REVEALS ITS VISION FOR ELECTRONIC DESIGN DEBUGGING, PREVIEWS ITS FIRST JTAG-BASED DEBUG AND VISUALATION SYSTEM AT THE INTERNATIONAL TEST CONFERENCE

TurboDebug-PCB detects, locates and diagnoses interconnect faults on printed circuit boards; Uses a PC with a PCI interface and DFT software to improve board test; Annotates debug results on design schematics

Baltimore, Maryland, October 30, 2001 - International Test Conference --SynTest Technologies, Inc. of Sunnyvale, California announced that the Company is entering the test and debug market for electronic design and that a new family of products will reduce the cost of test and debug. The first product in SynTest's debug family-- TurboDebug-PCB™ -- is being previewed and demonstrated this week at The International Test Conference here at booth # 2420.

TurboDebug-PCB™ is a PC-based system running on the Linux OS that includes software and hardware to help debug test problems on prototype printed circuit boards (PCBs) prior to expensive, time-consuming full production testing. TurboDebug-PCB detects, diagnoses and locates interconnect (wiring) faults on PCBs populated by one or more IC or SoC.

Ravi Apte, Vice President of Marketing and Business Development at SynTest, noted, "We are all about reducing the cost of test, and we are positioning ourselves as a player in the test and debug market with our first product--a board test and debug product that is available for beta testing now. Next year, we plan to announce follow-on products that will improve board as well as IC and SoC test and debug prior to full production testing."

Apte added, "Our new product family is possible now, since the JTAG interface is widely accepted."
With TurboDebug-PCB, and system ICs in place on a prototype board, test and debug engineers can see on their schematics, exactly where board interconnect problems are and correct them before board manufacturing and full production test begins.

The TurboDebug system includes a PCI interface board, a "demo" PCB and connection cable, as well as DFT software. The software uses the boundary scan chain to detect "open" or "short" faults on the PCB. The system operates on any PC with a PCI slot. During testing, the PC-based interface board is connected via a cable to the boundary scan pins (TDO, TDI, TCK etc.) on the PCB. Interconnects to peripheral I/O pins are also debugged with the system.

Price and Availability

TurboDebug-PCB is available for beta testing now. Production units will ship in first quarter 2002. Pricing will be announced later this year.

About SynTest

SynTest Technologies, Inc. develops and markets DFT and fault simulation software tools and offers consulting services throughout the world to semiconductor companies, ASIC designers and test groups.
The Company's products improve an electronic design's testability and fault coverage and result in not only reduced defect levels and costly tester time, but also reduced slippage in time-to-market.

SynTest's DFT products include memory BIST for testing embedded memories, logic BIST for "at-speed" testing of logic blocks, a boundary-scan (JTAG) test suite, a DFT integration tool suite, DFT testability checkers for RTL and gate-level netlists, a partial-scan and full- scan synthesis and ATPG tool suite and a super-fast concurrent fault simulator. For more information visit, www.syntest.com.

Acronyms and definitions:
DFT: Design-for-Test
IC: Integrated Circuits
JTAG: Joint Test Action Group
PCB: Printed Circuit Board
SoC: System-on-Chip

TurboDebug-PCB is a trademark of SynTest Technologies, Inc.
All other trademarks are the property of their respective owners.

For Release October 30, 2001 at the International Test Conference
Press Contact:
Georgia Marszalek, ValleyPR for SynTest, 650-345-7477, georgia@valleypr.com