For release November 23, 1998
For
Information Contact:
Georgia Marszalek, SynTest Public Relations Counsel
(650)
345-7477, georgia@valleypr.com
SynTest Announces Its First European and Israeli Distributors
SynTest
signs representatives in Germany and Israel, Plans to expand distribution in Europe
Sunnyvale,
CA, USA -November 23, 1998 - SynTest Technologies, Inc. (Sunnyvale, CA, USA),
an EDA Company and supplier of DFT tools for IC designers and foundries, announced
today that
it has signed with distributors in Germany and Israel.
TRIAS
Mikroelektronik (Krefeld, Germany) represents SynTest in Germany and Advanced
Semiconductor Technology (AST) represents SynTest in Israel.
SynTest¡¯s
DFT solutions improve a design¡¯s testability by reducing defect levels and shortening
tester time.
According to L.-T. Wang,
SynTest Technologies¡¯ president, "There is worldwide interest in our
DFT solutions, and we are putting an experienced distribution team in place to
address inquiries
from Europe and Israel."
According
to Klaus Steinheuer, TRIAS` Director of Sales and Marketing, " We are proud
of
representing SynTest in Germany. The DFT Tools give us the possibility
to offer our customer base
especially these ones which are developing ASICs
an advanced IC Test and fault simulation solution.
As TRIAS is a specialist
for EDA Tools and ASIC solutions we find in the SynTest`tools a good
complement
to our product lines."
Wang noted,
"We are actively seeking representatives in other European countries, including
the United Kingdom, Scandinavia, Italy and France."
The
distributors offer SynTest¡¯s TurboFCE¢â, an RT-level fault coverage enhancer; TurboBSD¢â,
a boundary-scan test suite; TurboCheck¢â, a gate-level and RT-level design and
testability analyzer;
TurboScan¢â, a partial-scan and full-scan synthesis and
ATPG program, and TurboFault¢â, a fast,
software, gate-level fault simulator.
SynTest¡¯s
products are available for the UNIX platforms. Windows NT versions of SynTest¡¯s
TurboFCE, TurboCheck and TurboFault were introduced last month (10/19).
About SynTest:
SynTest Technologies, Inc.
was founded in 1990 and is headquartered in Sunnyvale, CA, USA with
offices
in Japan, Taiwan and Korea. The Company develops and markets DFT software tools
and
offers consulting services throughout the world. SynTest has over 80 customers,
including semiconductor companies, ASIC designers and test groups.
SynTest
Technologies, Inc., 505 S. Pastoria Ave, Suite 101, Sunnyvale, CA 94086, USA,
408-720-9956, Fax: 408-720-9960, info@SynTest.com, http://www.SynTest.com
###
Contacts for Reader Inquiries:
USA:
SynTest Technologies, Inc., 505 S. Pastoria Ave, Suite 101, Sunnyvale, CA 94086,
USA
408-720-9956, Fax: 408-720-9960, info@SynTest.com,
www.SynTest.com
Attn: Elisabeth Calder
Germany:
TRIAS Mikroelektronik GmbH, Moerser Landstr.408 D-47802 Krefeld, Germany
Tel.
+49 - 2151 - 95301-22, Fax: +49 - 2151 ? 9530115,
info@trias.kr.uunet.de
Attn: Klaus Steinheuer
Israel:
AST - Advanced Semiconductor Technology, 3, Hazan St., Raanana, 43563, Israel
972-9-77-44-278
Ext: 310, Fax: 972-9-77-444-99, moshe@ast.co.il
www.ast.co.il,
Attn: Moshe
Zalcberg, EDA Product Manager
Acronyms
and definitions:
ASIC: Application
Specific Integrated Circuit
ATPG: Automatic Test Pattern Generation
DFT:
Design-for-Test
EDA: Electronic Design Automation
HDL: Hardware Description
Language
IC: Integrated Circuit
RTL: Register Transfer-Level (a design description
above gate-level netlists)
Previous
Press Release: SynTest Introduces a Fault Coverage Enhancer, Enters the Windows
NT
Market and Upgrades its Testability Checker and Fault Simulator (October
7, 1998)
TurboFCE,
TurboBSD, TurboCheck, TurboFault, and TurboScan are trademarks
of SynTest
Technologies, Inc. All other trademarks are the property of their respective owners.