European Patents (Registered in the United Kingdom, France, and Germany):
1,360,513 – MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOCK-DOMAIN FAULT DURING SELF-TEST OR SCAN TEST

1,370,880 – A MULTIPLE-CAPTURE DFT SYSTEM FOR SCAN-BASED INTEGRATED CIRCUITS

Japan Patents:
4301813 – 自己試験中または走査試験中にクロックドメインにまたがる故障を検出するか突き止める複数キャプチャDFTシステム MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOCK-DOMAIN FAULT DURING SELF-TEST OR SCAN TEST

4733191 – 自己試験中または走査試験中にクロックドメインにまたがる故障を検出するか突き止める複数キャプチャDFTシステム MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOCK-DOMAIN FAULT DURING SELF-TEST OR SCAN TEST

4903365 – スキャンベースの集積回路でスキャンパターンをブロードキャストする方法および装置 METHOD AND DEVICE FOR BROADCASTING SCAN PATTERN BY SCAN-BASED INTEGRATED CIRCUIT

5059837 - スキャンベースの集積回路でスキャンパターンをブロードキャストする方法および装置 METHOD AND DEVICE FOR BROADCASTING SCAN PATTERN BY SCAN-BASED INTEGRATED CIRCUIT

China Patents:
ZL 02 804862.1 – MULTIPLE-CAPTURE DFT SYSTEM FOR DETECTING OR LOCATING CROSSING CLOCK-DOMAIN FAULT DURING SELF-TEST OR SCAN TEST

ZL 2011 1 0377919.9 – METHOD AND APPARATUS FOR BROADCASTING SCAN PATTERNS IN A SCAN-BASED INTEGRATED CIRCUIT