What some of our customers say


Tony Chiang, Vice President of Engineering at Bay Microsystems said, "We are very happy with our choice of SynTest, as our DFT partner. By providing exemplary DFT services, and installing their tools at our site, they enabled us to test various modules on command, drastically reducing down time and maximizing our productivity. The compact ATPG patterns generated by SynTest's TurboScan-ATPG software allowed us to reduce time-to-market. using ATE to test the structural reliability of our chip design."


"We consider TurboFault to be a very effective tool for very fast fault simulation of multi-million gate SoC designs," said Mr. K. Murawaki, Senior Manager of Sanyo Semiconductor Company.
Mr. Ohnishi, Manager of Sanyo Semiconductor Company noted, "TurboFault's processing time is shorter than other tools and we believe it is the only tool that provides fault coverage for multi-million gate LSI designs. It is also quite useful for generating high fault coverage test vectors in the earliest stage of the design."

Mr. K. Yamamura, Senior Staff of Sanyo Semiconductor Company, commented "We are impressed not only by SynTest's technology but also by its support."


Benjamin Chiu, Section Manager of Design Methodology at VIA, noted, "Our experience with the past several designs has proven the value and usefulness of SynTest's complete suite of DFT, BIST, scan synthesis and ATPG tools. They fit very well into our flow and out-perform any other tools available in the marketplace today."


Dr, Woo-Hyun Paik, Group Leader/Chief Research Engineer at System IC Division, LG Electronics said, "VirtualScan product from SynTest for test compression delivers predictable compression ratio, has a negligible area overhead, and still employs the existing ATPG flow for ease of implementation. With production proven parts in our hands, we are impressed with the test cost reduction VirtualScan delivers."

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